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WCET-Aware Dynamic Code Management on Scratchpads for Software-Managed Multicores
Yooseong Kim, David Broman, Jian Cai, Aviral Shrivastava

Citation
Yooseong Kim, David Broman, Jian Cai, Aviral Shrivastava. "WCET-Aware Dynamic Code Management on Scratchpads for Software-Managed Multicores". Proceedings of the 20th IEEE Real-Time and Embedded Technology and Application Symposium (RTAS), April, 2014.

Abstract
Software Managed Multicore (SMM) architectures have advantageous scalability, power efficiency, and predictability characteristics, making SMM particularly promising for real-time systems. In SMM architectures, each core can only access its scratchpad memory (SPM); any access to main memory is done explicitly by DMA instructions. As a consequence, dynamic code management techniques are essential for loading program code from the main memory to SPM. Current state-of-the-art dynamic code management techniques for SMM architectures are, however, optimized for average-case execution time, not worst-case execution time (WCET), which is vital for hard real-time systems. In this paper, we present two novel WCET-aware dynamic SPM code management techniques for SMM architectures. The first technique is optimal and based on integer linear programming (ILP), whereas the second technique is a heuristic that is sub-optimal, but scalable. Experimental results with benchmarks from Malardalen WCET suite and MiBench suite show that our ILP solution can reduce the WCET estimates up to 80% compared to previous techniques. Furthermore, our heuristic can, for most benchmarks, find the same optimal mappings within one second on a 2GHz dual core machine.

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Citation formats  
  • HTML
    Yooseong Kim, David Broman, Jian Cai, Aviral Shrivastava.
    <a
    href="http://chess.eecs.berkeley.edu/pubs/1049.html"
    >WCET-Aware Dynamic Code Management on Scratchpads for
    Software-Managed Multicores</a>, Proceedings of the
    20th IEEE Real-Time and Embedded Technology and Application
    Symposium (RTAS), April, 2014.
  • Plain text
    Yooseong Kim, David Broman, Jian Cai, Aviral Shrivastava.
    "WCET-Aware Dynamic Code Management on Scratchpads for
    Software-Managed Multicores". Proceedings of the 20th
    IEEE Real-Time and Embedded Technology and Application
    Symposium (RTAS), April, 2014.
  • BibTeX
    @inproceedings{KimBromanCaiShrivastava14_WCETAwareDynamicCodeManagementOnScratchpadsForSoftwareManaged,
        author = {Yooseong Kim and David Broman and Jian Cai and
                  Aviral Shrivastava},
        title = {WCET-Aware Dynamic Code Management on Scratchpads
                  for Software-Managed Multicores},
        booktitle = {Proceedings of the 20th IEEE Real-Time and
                  Embedded Technology and Application Symposium
                  (RTAS)},
        month = {April},
        year = {2014},
        abstract = {Software Managed Multicore (SMM) architectures
                  have advantageous scalability, power efficiency,
                  and predictability characteristics, making SMM
                  particularly promising for real-time systems. In
                  SMM architectures, each core can only access its
                  scratchpad memory (SPM); any access to main memory
                  is done explicitly by DMA instructions. As a
                  consequence, dynamic code management techniques
                  are essential for loading program code from the
                  main memory to SPM. Current state-of-the-art
                  dynamic code management techniques for SMM
                  architectures are, however, optimized for
                  average-case execution time, not worst-case
                  execution time (WCET), which is vital for hard
                  real-time systems. In this paper, we present two
                  novel WCET-aware dynamic SPM code management
                  techniques for SMM architectures. The first
                  technique is optimal and based on integer linear
                  programming (ILP), whereas the second technique is
                  a heuristic that is sub-optimal, but scalable.
                  Experimental results with benchmarks from
                  Malardalen WCET suite and MiBench suite show that
                  our ILP solution can reduce the WCET estimates up
                  to 80% compared to previous techniques.
                  Furthermore, our heuristic can, for most
                  benchmarks, find the same optimal mappings within
                  one second on a 2GHz dual core machine.},
        URL = {http://chess.eecs.berkeley.edu/pubs/1049.html}
    }
    

Posted by David Broman on 15 Jan 2014.
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