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The Case for the Precision Timed (PRET) Machine
Stephen A. Edwards, Edward A. Lee

Citation
Stephen A. Edwards, Edward A. Lee. "The Case for the Precision Timed (PRET) Machine". Technical report, University of California, Berkeley, UCB/EECS-2006-149, November, 2006.

Abstract
We argue that at least for embedded software applications, computer architecture, software, and networking have gone too far down the path of emphasizing average case performance over timing predictability. In architecture, techniques such as multi-level caches and deep pipelines with dynamic dispatch and speculative execution make worst-case execution times (WCET) highly dependent on both implementation details of the processor and on the context in which the software is executed. Yet virtually all real-time programming methodologies depend on WCET. When timing properties are important in the software and when concurrent execution is affected by timing, the result is brittle designs. In this paper, we argue for precision timed (PRET) machines, which deliver high performance, but not at the expense of timing predictability. We summarize a number of research approaches that can be used to create PRET machines, and discuss how the software, operating system, and networking abstractions built above the machine architecture will have to change.

Electronic downloads

Citation formats  
  • HTML
    Stephen A. Edwards, Edward A. Lee. <a
    href="http://chess.eecs.berkeley.edu/pubs/316.html"
    ><i>The Case for the Precision Timed (PRET)
    Machine</i></a>, Technical report,  University
    of California, Berkeley, UCB/EECS-2006-149, November, 2006.
  • Plain text
    Stephen A. Edwards, Edward A. Lee. "The Case for the
    Precision Timed (PRET) Machine". Technical report, 
    University of California, Berkeley, UCB/EECS-2006-149,
    November, 2006.
  • BibTeX
    @techreport{EdwardsLee06_CaseForPrecisionTimedPRETMachine,
        author = {Stephen A. Edwards and Edward A. Lee},
        title = {The Case for the Precision Timed (PRET) Machine},
        institution = {University of California, Berkeley},
        number = {UCB/EECS-2006-149},
        month = {November},
        year = {2006},
        abstract = {We argue that at least for embedded software
                  applications, computer architecture, software, and
                  networking have gone too far down the path of
                  emphasizing average case performance over timing
                  predictability. In architecture, techniques such
                  as multi-level caches and deep pipelines with
                  dynamic dispatch and speculative execution make
                  worst-case execution times (WCET) highly dependent
                  on both implementation details of the processor
                  and on the context in which the software is
                  executed. Yet virtually all real-time programming
                  methodologies depend on WCET. When timing
                  properties are important in the software and when
                  concurrent execution is affected by timing, the
                  result is brittle designs. In this paper, we argue
                  for precision timed (PRET) machines, which deliver
                  high performance, but not at the expense of timing
                  predictability. We summarize a number of research
                  approaches that can be used to create PRET
                  machines, and discuss how the software, operating
                  system, and networking abstractions built above
                  the machine architecture will have to change.},
        URL = {http://chess.eecs.berkeley.edu/pubs/316.html}
    }
    

Posted by Christopher Brooks on 7 Jun 2007.
Groups: pret
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