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Temporal Isolation on Multiprocessing Architectures
Dai Bui, Edward A. Lee, Isaac Liu, Hiren Patel, Jan Reineke

Citation
Dai Bui, Edward A. Lee, Isaac Liu, Hiren Patel, Jan Reineke. "Temporal Isolation on Multiprocessing Architectures". Design Automation Conference (DAC), 274 - 279, June, 2011.

Abstract
Multiprocessing architectures provide hardware for executing multiple tasks simultaneously via techniques such as simultaneous multithreading and symmetric multiprocessing. The problem addressed by this paper is that even when tasks that are executing concurrently do not communicate, they may interfere by acting each other's timing. For cyberphysical system applications, such interference can nullify many of the advantages offered by parallel hardware. In this paper, we argue for temporal semantics in layers of abstraction in computing. This will enable us to achieve temporal isolation on multiprocessing architectures. We discuss techniques at the microarchitecture level, in the memory hierarchy, in on-chip communication, and in the instruction-set architecture that can provide temporal semantics and control over timing.

Electronic downloads

Citation formats  
  • HTML
    Dai Bui, Edward A. Lee, Isaac Liu, Hiren Patel, Jan Reineke.
    <a
    href="http://chess.eecs.berkeley.edu/pubs/839.html"
    >Temporal Isolation on Multiprocessing
    Architectures</a>, Design Automation Conference (DAC),
    274 - 279, June, 2011.
  • Plain text
    Dai Bui, Edward A. Lee, Isaac Liu, Hiren Patel, Jan Reineke.
    "Temporal Isolation on Multiprocessing
    Architectures". Design Automation Conference (DAC), 274
    - 279, June, 2011.
  • BibTeX
    @inproceedings{BuiLeeLiuPatelReineke11_TemporalIsolationOnMultiprocessingArchitectures,
        author = {Dai Bui and Edward A. Lee and Isaac Liu and Hiren
                  Patel and Jan Reineke},
        title = {Temporal Isolation on Multiprocessing Architectures},
        booktitle = {Design Automation Conference (DAC)},
        pages = {274 - 279},
        month = {June},
        year = {2011},
        abstract = {Multiprocessing architectures provide hardware for
                  executing multiple tasks simultaneously via
                  techniques such as simultaneous multithreading and
                  symmetric multiprocessing. The problem addressed
                  by this paper is that even when tasks that are
                  executing concurrently do not communicate, they
                  may interfere by acting each other's timing. For
                  cyberphysical system applications, such
                  interference can nullify many of the advantages
                  offered by parallel hardware. In this paper, we
                  argue for temporal semantics in layers of
                  abstraction in computing. This will enable us to
                  achieve temporal isolation on multiprocessing
                  architectures. We discuss techniques at the
                  microarchitecture level, in the memory hierarchy,
                  in on-chip communication, and in the
                  instruction-set architecture that can provide
                  temporal semantics and control over timing.},
        URL = {http://chess.eecs.berkeley.edu/pubs/839.html}
    }
    

Posted by Dai Bui on 28 Apr 2011.
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